Semiconductor devices are used in many electronic and other applications. Semiconductor devices comprise integrated circuits that are formed on semiconductor wafers by depositing many types of thin films of material over the semiconductor wafers, and patterning the thin films of material to form the integrated circuits.
One type of semiconductor device is a memory device, in which data is typically stored as a logical “1” or “0.” A memory device may be static or dynamic. A dynamic memory device needs to be refreshed to “remember” the data, whereas a static memory device does not need to be refreshed to retain stored data.
One type of static memory device, also referred to in the art as a non-volatile memory (NVM) device, is a floating gate memory device. A floating gate memory device can be either erasable programmable read-only memory (EPROM) or electrically erasable programmable read-only memory (EEPROM). Both types of floating gate memories rely on a charge stored in the floating gate (or a charge trap layer) by suitable application of a bias to the various terminals of the device. The charge may be stored by a number of mechanisms such as carrier tunneling and/or injection. The charge may be removed either electrically as in EEPROM devices or by an external source such as an ultra violet light. The presence of this charge in the floating gate determines the state of the memory as logical “1” or “0.” Flash EEPROM memories are called such due to their fast program and erase times (as in a lightning flash).
As semiconductor device geometries get smaller and smaller, however, the fabrication of non-volatile memory devices becomes more challenging. In order to maintain long-term charge storage and data retention using state-of-the art semiconductor processes, thicker inter-poly oxides may be required. The combination of these thicker oxides and smaller device areas have potentially decreased capacitive coupling between the control gate and the floating gate within the memory device which requires higher programming voltages to be developed on-chip. Unfortunately, higher programming voltages increase power consumption and may exceed voltage levels that high density logic devices are able to sustain in fine geometry processes.
One possible solution to the problems associated with using thicker oxides is to employ the use of high-k dielectric materials. These high-k materials, however, are difficult to etch and require additional fabrication process steps to ensure their successful use. What is needed are better methods and processes for patterning and etching high-k dielectric materials.